Floating-gate analog circuits are being used to implement advanced signal processing functions and are very useful for processing analog signals prior to analog to digital conversion. We present an architecture analogous to FPGA architectures for rapid prototyping of analog signal processing systems. These systems go beyond simple programmable amplifiers and filters to include programmable and adaptive filters, multipliers, gains, winner-take-all circuits, and matrix array signal operations. We discuss architecture as well as details such as switching characteristics and interfacing to digital circuits or FPGAs.
For creating extremely low-power signal processing systems, it is often necessary to implement substantial portions of the processing in analog circuits [1]. The process of designing, fabricating, and testing an analog chip requires certain expertise and is often long and expensive. The process is not unlike designing digital ASICs (application specific integrated circuits) except there are fewer tools and libraries available to the designer. The difficulties in digital ASIC design are largely ameliorated by using FPGAs that, for digital circuits, provide a fast, simple way to implement, test, and eventually compile custom circuits.
Field-programmable digital circuits have made a large impact on the development of custom digital chips by enabling a designer to try custom designs on easily reconfigurable hardware. These integrated circuits have programmable logic elements and programmable interconnects between the logic elements. Using these programmable devices greatly reduce the design time and cost for custom circuits.
Programmable floating-gate analog devices have benefits and design similar to FPGAs. Like FPGAs, the analog arrays, dubbed field-programmable analog arrays or FPAAs, are not optimal for all solutions. They are, however, very useful for many situations, and a solution can be found for many problems not requiring full functionality.
Relative to custom-designed analog circuits, a design implemented on an FPAA results in higher parasitics as well as increased die area for a given design; therefore, the design always possesses some ineffiencies (measured in lower bandwidth and higher consumed power). On the other hand, since analog circuit design is often time-consuming, these adverse tradeoffs are well balanced by decreased time to market.
The proposed FPAA chips are mixed-mode chips. While the computational and switching logic is all based on analog floating-gate transistors, the programming control and interface logic to the analog devices is all digital. Some related devices have been developed for analog circuit design, but historically, these devices have very few programmable elements and limited interconnect capabilities, making them limited in their usefulness and versatility. Currently available commercial and academic FPAAs are typically based on opamp circuits with only relatively few op-amps per chip [2-9].
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