Cooperative Analog and Digital Signal Processing : Georgia Institute of Technology  
group snapshot 2 group snapshot 1 group snapshot 3

References :: CADSP

[1] Paul Hasler and David V. Anderson. Cooperative analog-digital signal processing. In Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing,volume IV, pages 3972-5, Orlando, FL, May 2002.

[2] David V. Anderson and Paul Hasler. Cooperative analog/digital signal processing. In World Conference on Systemics, Cybernetics, and Informatics, Orlando, FL, July 2001.

[3] Tyson S. Hall Paul Hasler and David V. Anderson. Field-programmable analog arrays: A floating-gate approach. In 12th International Conference on Field Programmable Logic and Applications, Montpellier, France, September 2002.

[4] P. Hasler, C. Diorio, B. A. Minch, and C. A. Mead. Single transistor learning synapses. In Gerald Tesauro, David S.Touretzky, and Todd K. Leen, editors, Advances in Neural Information Processing Systems 7, pages 817-824. MIT Press, Cambridge, MA, 1995.

[5] Matt Kucic, Paul Hasler, Je Dugger, and David V. Anderson. Programmable and adaptive analog lters using arrays of floating-gate circuits. In Erik Brunvand and Chris Myers, editors,2001 Conference on Advanced Research in VLSI, pages 148-162. IEEE Computer Society,March 2001.

[6] P. D. Smith and P. Hasler. Analog speech recognition project. In Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing, volume 4, pages 3988-3991, Orlando, FL, 2002.

[7] Carver Mead. Analog VLSI and Neural Systems. Addison-Wesley, Reading, MA, 1989.

[8] K. Boahen and A. Andreou. A contrast-sensitive retina with reciprocal synapses. In J.E.Moody, editor, Advances in Neural Information Processing Systems 4. Morgan Kaufman Publishers, San Mateo, CA, 1991.

[9] L. Watts, D.A. Kerns, and R.F. Lyon. Improved implementation of the silicon cochlea. IEEE Journal of Solid-State Circuits, 27(5):692-700, 1992.

[10] J. Lazzaro and C. A. Mead. A winner-take-all circuit in o(n) complexity. In Gerald Tesauro and David S. Touretzky, editors, Advances in Neural Information Processing Systems 1, pages 817-824. MIT Press, Cambridge, MA, 1989.

[11] G. Tyson Tuttle, Siavask Fallahi, and Asad A. Abidi. An 8b CMOS vector A/D converter. In Proceedings of the IEEE International Solid State Circuits Conference, pages 257-259, Monterey, CA, 1993.

[12] Jeremy Lubkin and Gert Cauwenberghs. A micropower learning vector quantizer for parallel analog-to-digital data compression. In Proceedings of the IEEE International Symposium on Circuits and Systems, volume III, pages 58-61, Monterey, CA, 1998.

[13] M. Holler, S. Tam, H. Castro, and R. Benson. An electrically trainable artificial neural network with 10240 `floating gate' synapses. In Proceedings of the International Joint Conference on Neural Networks, volume II, pages 191-196, Washington, D.C., 1989.

[14] Paul Hasler, Bradley A. Minch, and Chris Diorio. Floating-gate devices: They are not just for digital memories anymore. In IEEE International Symposium on Circuits and Systems, volume II, pages 399{391, Orlando, Florida, 1999.

[15] P. Hasler and T.S. Lande. Special issue on floating-gate devices, circuits, and systems. IEEE Journal of Circuits and Systems, 48(1), January 2001.

[16] Gert Cauwenbergs. Learning in Silicon. Kluwer Academic, 1999.

[17] Carver A. Mead. Neuromorphic electronic systems. IEEE Proceedings, 78(10):1629-1636,October 1990.

back to Key Technologies :: CADSP