References :: Floating-Gate Circuits

[1] Paul Hasler, Paul Smith, Chris Duffy, Christal Gordon, Je Dugger, and David Anderson.A floating-gate vector-quantizer. In IEEE Midwest Circuits and Systems, Tulsa, OK, August 2002.

[2] Matt Kucic, AiChen Low, Paul Hasler, and Joe Ne . A programmable continuous-timeoating-gate fourier processor. IEEE Transactions on Circuits and Systems II, 48(1):90-99,January 2001.

[3] D. Kahng and S. M. Sze. A floating-gate and its application to memory devices. The Bell System Technical Journal, 46(4):1288-1295, 1967.

[4] S. Lai. Flash memories: where we were and where we are going. In IEEE International Electron Devices Meeting, pages 971-974, San Francisco, 1998.

[5] M. Holler, S. Tam, H. Castro, and R. Benson. n electrically trainable artificial neural network with 10240 `floating gate' synapses. In Proceedings of the International Joint Conference on Neural Networks, volume II, pages 191-196, Washington, D.C., 1989.

[6] C. A. Mead and M. Ismail, editors. Analog VLSI Implementation of Neural Systems. Kluwer Academic Publishers, Norwell, MA, 1989.

[7] T. Shibata and T. Ohmi. A functional MOS transistor featuring gate-level weighted sum and threshold operations. IEEE Transactions on Electron Devices, 39(6):1444-1455, 1992.

[8] P. Hasler, C. Diorio, B. A. Minch, and C. A. Mead. Advances in Neural Information Processing Systems 7, chapter Single transistor learning synapses, pages 817-824. MIT Press, Cambridge, MA, 1995.

[9] B. A. Minch, C. Diorio, P. Hasler, and C. A. Mead. Translinear circuits using subthresholdoating-gate MOS transistors. Analog Integrated Circuits and Signal Processing, 9(2):167-179,1996.

[10] Paul Hasler, Bradley A. Minch, Je Dugger, and Chris Diorio. Learning in Silicon, chapter Adaptive Circuits and Synapses Using pFET Floating-Gate Devices, pages 33-65. Kluwer Academic, 1999.

[11] ISD, San Jose, CA. ISD Data Book: Voice Recording and Playback ICs, 2nd edition, 1996.

[12] P. Hasler, C. Diorio, B. A. Minch, and C. A. Mead. Single transistor learning synapses. In Gerald Tesauro, David S.Touretzky, and Todd K. Leen, editors, Advances in Neural Information Processing Systems 7, pages 817{824. MIT Press, Cambridge, MA, 1995.

[13] Paul Hasler, Bradley A. Minch, Je Dugger, and Chris Diorio. Adaptive circuits and synapses using pfet floating-gate devices. In Gert Cauwenbergs, editor, Learning in Silicon, pages 33-65. Kluwer Academic, 1999.

[14] Paul Hasler and Bradley A. Minch. Floating-Gate Devices, Circuits, and Systems. IEEE Press,2002.

[15] Matt Kucic, Paul Hasler, Je Dugger, and David V. Anderson. Programmable and adaptive analog lters using arrays of floating-gate circuits. In Erik Brunvand and Chris Myers, editors,2001 Conference on Advanced Research in VLSI, pages 148-162. IEEE Computer Society,March 2001.

[16] Paul Hasler, Matt Kucic, and Bradley A. Minch. A transistor-only circuit model of the autozeroing floating-gate ampliflier. In Midwest Conference on Circuits and Systems, Las Cruces, NM, 1999.

[17] P. D. Smith and P. Hasler. Analog speech recognition project. In Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing, volume 4, pages 3988-3991, Orlando, FL, 2002.